Meeting the design challenges of nano-CMOS electronics

Urban Kovac

PhD Student

Department of Electronics and Electrical Engineering
University of Glasgow
Rankine Building
Oakfield Avenue
Glasgow G12 8LT
United Kingdom

web: http://userweb.elec.gla.ac.uk/k/kovac/en/index.php

Aims of research are to investigate current variability and nanometer scale CMOS transistors subject to random dopants variations, line edge roughness and oxide thickness variations. To develop a simulation methodology to accurately and efficiently model such devices, subject to the variations noted above, over complete range of bias conditions. The methodology will combine the accuracy of Monte Carlo simulation at high gate bias, with the efficiency of Drift Diffusion simulation at low gate bias.

	Meeting the design challenges of nano-CMOS Electronics UK consortium to use e-Science and Grid technology to tackle nano-CMOS design challenges
Menu Home People Publications Presentations Mailing Lists Partners Workshop Secure Site	You are here: Home » People » Urban Kovac Urban Kovac PhD Student Department of Electronics and Electrical Engineering University of Glasgow Rankine Building Oakfield Avenue Glasgow G12 8LT United Kingdom web: http://userweb.elec.gla.ac.uk/k/kovac/en/index.php Aims of research are to investigate current variability and nanometer scale CMOS transistors subject to random dopants variations, line edge roughness and oxide thickness variations. To develop a simulation methodology to accurately and efficiently model such devices, subject to the variations noted above, over complete range of bias conditions. The methodology will combine the accuracy of Monte Carlo simulation at high gate bias, with the efficiency of Drift Diffusion simulation at low gate bias.

Meeting the design challenges of nano-CMOS Electronics

Urban Kovac

PhD Student