Meeting the design challenges of nano-CMOS Electronics

Gareth Roy

Research Assistant

Department of Electronics and Electrical Engineering
University of Glasgow
Rankine Building
Oakfield Avenue
Glasgow G12 8LT
United Kingdom




web: http://userweb.elec.gla.ac.uk/g/garethr/

I have been working mainly in the field of nano-CMOS devices, focusing mainly on the impact of intrinsic parameter fluctuations on device performance. I have studied the effects of parameter fluctuation on well scaled devices in the 90, 65, 45, 32 and 22 nm technology nodes, using advanced simulation techniques. These simulations have been carried out on large scale parallel computer systems and I am currently employed on HPCx to develop and maintain these parallel codes.

My interests also extend into the field of reconfigurable and distributed computing as well as mobile computing focusing mainly on the use of intelligent agents.