ESSDERC/ESSCIRC Workshop
cmos variability research in europe: from atomic scale to circuits and systems

Edinburgh International Conference Centre
19th September 2008

Measuring and Understanding Device Variability


Toshiro Hiramoto

The “Robust Design of Transistor” Program started in 2006 in the framework of MIRAI Project and aims to achieve a scientific elucidation of the problem of atomic-level variability in VLSI through measurement, classification, and root cause analysis of transistor variability, and in the end to establish methods for controlling the variability in characteristics.

The main achievements in the Program are [1,2]:

  1. Designed 1M device-matrix-array TEG and found that Vth distributions of both nFET and pFET show high normality in the range of ±5σ, as shown in Fig. 1.
  2. Developed a new normalization method of Vth fluctuations in terms not only of device size but also of Vth and Tinv (Takeuchi Plot), as shown in Fig. 2.
  3. Compared the Vth fluctuation data in different technologies and fabs using Takeuchi Plot and found that pFET fluctuations can be almost fully explained by discrete dopant fluctuations while nFET has some fluctuation mechanisms other than dopant fluctuations, as shown in Fig. 3.

Fig. 1. Measured Vth distribution of nFET.
Fig. 2. Comparison of conventional plot and Takeuchi plot.
Fig. 3. Variability in pFET and nFET in different technologies and fabs. Avt and Bvt are shown.

[1] K. Takeuchi et al., “Understanding Random Threshold Voltage Fluctuation by Comparing Multiple Fabs and Technologies”, International Electron Devices Meeting (IEDM), pp. 467-470, 2007.
[2] T. Tsunomura et al. “Analyses of 5σ Vth Fluctuation in 65nm-MOSFETs Using Takeuchi Plot”, to be presented in Symposium on VLSI Technology, 2008.

Acknowledgement: This work is supported by NEDO.

modeling summer school semiconductors Semiconductors semiconductor devices education training microelectronics industry medici TMA suprem workbench Synopsys Silvaco device modeling device simulation semiconductor simulation process simulation diffusion ion implantation impurities oxidation furnace finite element industrial services finite elements calibration design semiconductor research University of Glasgow electronics electrical engineering courses MOSFET CMOS transistor BJT diode doping doping profile electrons holes potential concentration fabrication silicon Si gallium arsenide GaAs silicon germanium III-V SiGe quantum mechanics transport band structures IWCE IEDM SISPAD ESSDERC density gradient taurus monte-carlo monte carlo thin body strained silicon CMOS SiNano device physics atomistic SOI greens functions green post doctoral academic glasgow tutorial summerschool simulation