ESSDERC/ESSCIRC Workshop
cmos variability research in europe: from atomic scale to circuits and systems

The first sixty years of computing have seen spectacular progress in the technology, driven for the last forty years by Moore’s Law which, though initially an observation, has become a self-fulfilling prophecy and a board-room planning tool. Ever shrinking transistor dimensions have yielded increasingly complex and cost-effective microchips, a win-win scenario that has driven the explosion in the use of digital electronics and enabled computers to be embedded into a vast range of high-volume products.

Fig. 1: The SpiNNaker system architecture, which incorporates up to a million ARM processor cores and is designed to tolerate run-time component failure. The machine is intended to model large-scale systems of spiking neurons in real time, and is based upon a multicore processor chip with 20 ARM processors.

However, there are limits to how small a transistor can be made, and we can no longer assume that smaller circuits will go faster, or be more power-efficient. As we approach atomic limits device variability is beginning to hurt, and the cost of microchip design is spiralling upwards. On the desktop, technology changes are driving a trend away from high-speed uniprocessors towards multi-core, and soon many-core, processors, despite the fact that general-purpose parallel programming remains one of the great unsolved problems of computer science.

If the cost-effectiveness of microchip technology is to continue to improve there are major challenges ahead, involving understanding how to build reliable systems on increasingly unreliable technology and how to exploit parallelism increasingly effectively, not only to improve performance, but also to mask the consequences of component failure.

Biological systems demonstrate many of the properties we aspire to incorporate into our engineered technology, so perhaps that suggests a possible source of ideas that we could seek to incorporate into future novel computation systems? The “SpiNNaker” computer (Fig. 1) is primarily aimed at modelling very large-sale systems of spiking neurons with the goal of accelerating our understanding of brain function, but it will also provide a platform for the investigation of variability and unreliability on system robustness, and will help find ways to address these important issues that will face the microchip industry in the near future.

In this talk I will focus on the impact of variability on the design of the SpiNNaker chip, which is a multicore processor (incorporating 20 ARM cores) that forms the basis of the SpiNNaker machine, and reflect on the lessons learned so far. I will then speculate on the consequences for future multicore designs on smaller processes with greater variability and higher component failure rates.