ESSDERC/ESSCIRC Workshop
cmos variability research in europe: from atomic scale to circuits and systems

Statistical variability introduced by discreteness of charge and granularity of matter which cannot be reduced by better process control, has become a major concern associated with CMOS transistors scaling and integration. It already critically affects SRAM scaling, and introduces leakage and timing issues in digital logic circuits. The variability is the main factor restricting the scaling of the supply voltage, which for the last three technology generations has remained constant, adding to the looming power crisis. Therefore, it is very important to understand properly the main factors that introduce variability in the present and in the next generation CMOS transistor.

Fig. 1 Channel surface potential variation due to the surface potential pinning at grain boundaries of the poly-Si gate.	Fig. 2 Channel surface potential variation due to the granularity of the HfON high-κ gate dielectric.	Fig. 3 Localised change in the transistor current due to strategic placement of single traped charge in the gate dielectric.

In this talk we review the major sources of variability in CMOS devices focusing at and beyond 45nm technology generation and beyond. We examine intrinsic parameter fluctuations introduced by discreteness of charge and matter, which play an increasingly important role in the present and future CMOS devices and cannot be controlled or reduced by tightening the process tolerances. Apart from ransom discrete dopants and line edge roughness which has been identified earlier and studied in numerous papers we focus on variability which steems from granularity of the materials in the gate stack. The granularity of the polysilicon gate illustrate in Fig. 1 is an important factor adding to the variability in bulk MOSFETs and may be responsible for the asymmetry between the variability of the n- and p-channel MOSFETs. With the introduction of high-κ gate stacks in the 45 nm technology generation the granularity (Fig. 2) and charge trapping (Fig.3) in the high-κ dielectric may become an important source of variability and we will report preliminary results related to this.