Meeting the design challenges of nano-CMOS electronics

David Reid

Department of Electronics and Electrical Engineering
University of Glasgow
Rankine Building
Oakfield Avenue
Glasgow G12 8LT
United Kingdom

web:

I am working on the simulation of large statistical ensembles of nanocmos devices and studying the effects of intrinsic parameter fluctuations on device parameters in these ensembles. I have been working with grid and eScience people at NeSC to enable these simulations on large scale parallel systems.

	Meeting the design challenges of nano-CMOS Electronics UK consortium to use e-Science and Grid technology to tackle nano-CMOS design challenges
Menu Home People Publications Presentations Mailing Lists Partners Workshop Secure Site	You are here: Home » People » David Reid David Reid Department of Electronics and Electrical Engineering University of Glasgow Rankine Building Oakfield Avenue Glasgow G12 8LT United Kingdom web: I am working on the simulation of large statistical ensembles of nanocmos devices and studying the effects of intrinsic parameter fluctuations on device parameters in these ensembles. I have been working with grid and eScience people at NeSC to enable these simulations on large scale parallel systems.

Meeting the design challenges of nano-CMOS Electronics

David Reid